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? semiconductor components industries, llc, 2010 july, 2010 ? rev. 11 1 publication order number: ncp5500/d ncp5500, ncv5500, ncp5501, ncv5501 500 ma ldo voltage regulator these linear low drop voltage regulators provide up to 500 ma over a user ? adjustable output range of 1.25 v to 5.0 v, or at a fixed output voltage of 1.5 v, 3.3 v or 5.0 v, with typical output voltage accuracy better than 3%. an internal pnp pass transistor permits low dropout voltage and operation at full load current at the minimum input voltage. ncv versions are qualified for demanding automotive applications that require extended temperature operation and site and change control. ncp5500 and ncv5500 versions include an enable/shutdown function and are available in a dpak 5 and soic 8 packages. ncp5501 and ncv5501 versions are available in dpak 3 for applications that do not require logical on/off control. this regulator family is ideal for applications that require a broad input voltage range, and low dropout performance up to 500 ma load using low cost ceramic capacitors. integral protection features include short circuit current and thermal shutdown. features ? output current up to 500 ma ? 2.9% output voltage accuracy ? low dropout voltage (230 mv at 500 ma) ? enable control pin (ncp5500 / ncv5500) ? reverse bias protection ? short circuit protection ? thermal shutdown ? wide operating temperature range ncv5500 / ncv5501; ? 40 c to +125 c ambient temperature ncp5500 / ncp5501; ? 40 c to +85 c ambient temperature ? ncv prefix for applications that require site and change control ? stable with low cost ceramic capacitors ? these are pb ? free devices typical applications ? automotive ? industrial and consumer ? post smps regulation ? point of use regulation figure 1. typical application circuit input off on output gnd ncp5500 en* nc/adj* gnd r l c out 4.7 f ncv5500 r 1 * r 2 * enable ncp5501 ncv5501 c in 10 f *applicable to ncp5500/ncv5500 only. v out v in x5500yg alyww 15 dpak 5 center lead crop case 175aa see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information marking diagrams http://onsemi.com x = p (ncp), v (ncv) 5500/1 = device code y = output voltage = l = 1.5 v = t = 3.3 v = u = 5.0 v = w = adjustable a = assembly location l = wafer lot y = year ww = work week g = pb ? free package 1 2 3 4 dpak 3 single gauge case 369c 13 x5501yg alyww 5 1 pin 1. en 2. v in tab,3. gnd 4. v out 5. nc/adj pin 1. v in tab,2. gnd 3. v out 5500x alyw 1 8 1 8 soic ? 8 case 751 pin 1. v in 2. gnd 3. gnd 4. v out 5. nc/adj 6. gnd 7. gnd 8. en x = output voltage, ncp/ncv a = adjustable, ncv b = adjustable, ncp a = assembly location l = wafer lot y = year w = work week = pb ? free package
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 2 pin function descriptions dpak 3 dpak 5 soic ? 8 pin name description pin no. pin no. pin no. ? 1 8 en enable. this pin allows for on/off control of the regulator. high level turns on the output. to disable the device, connect to ground. if this function is not in use, con- nect to v in . 1 2 1 v in positive power supply input voltage. 2, tab 3, tab 2, 3, 6, 7 gnd ground. this pin is internally connected to the tab heat sink. 3 4 4 v out regulated output voltage. ? 5 5 nc/adj no connection (fixed output versions). voltage ? adjust input (adjustable output version). use an external voltage divider to set the output voltage over a range of 1.25 v to 5.0 v. figure 2. block diagram ? + nc / adj* en* gnd connection for adjustable output connection for fixed output error amplifier current limit and saturation sense bandgap reference thermal shutdown *applicable to ncp5500/ncv5500 only. v out v in enable block*
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 3 absolute maximum ratings rating symbol min max unit input voltage (note 1) v in ? 0.3 (note 2) +18 v output, enable voltage v out , en ? 0.3 +16 or v in + 0.3 (notes 2 and 5) v maximum junction temperature t j ? 150 c storage temperature t stg ? 55 +150 c moisture sensitivity level all packages msl 1 ? lead temperature soldering reflow (smd styles only), pb ? free versions (note 3) t sld 265 peak c esd capability, human body model (note 4) esd hbm 4000 ? v esd capability, machine model (note 4) esd mm 200 ? v esd capability, charged device model (note 4) esd cdm 1000 ? v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. *latchup current maximum rating: 100 ma per jedec standard: jesd78. 1. refer to electrical characteristics and application information for safe operating area. 2. reverse bias protection feature valid only if v out ? v in 7 v. 3. pb ? free, 60 sec ?150 sec above 217 c, 40 sec max at peak temperature 4. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) esd charged device model tested per eia/jes d22/c101, field induced charge model 5. maximum = +16 v or (v in + 0.3 v), whichever is lower. thermal characteristics rating symbol min max unit package dissipation thermal characteristics, dpak 3 and dpak 5 (note 1) thermal resistance, junction ? to ? air (note 6) thermal resistance, junction ? to ? case thermal characteristics, soic ? 8 (note 1) thermal resistance, junction ? to ? air (note 6) thermal reference, junction ? to ? lead p d r ja r jc r ja r jl internally limited 60 5.2 80 22 w c/w c/w 6. as measured using a copper heat spreading area of 650 mm 2 , 1 oz copper thickness. operating ranges rating symbol min max unit operating input voltage (note 1) v in v out + v do , 2.5 v (note 7) 16 v adjustable output voltage range (adjustable version only) v out 1.25 5.0 v operating ambient temperature range ncp5500, ncp5501 ncv5500, ncv5501 t a ? 40 ? 40 85 125 c 7. minimum v in = 2.5 v or (v out + v do ), whichever is higher.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 4 electrical characteristics v in = 2.5 v or v out + 1.0 v (whichever is higher), c in = 10 f, c out = 4.7 f, for typical values t a = 25 c, for min/max values t a = ? 40 c to 85 c (ncp version), t a = ? 40 c to 125 c (ncv version) unless otherwise noted (note 13). characteristic symbol test conditions min typ max unit output output voltage (note 14) 5 v regulator 3.3 v regulator 1.5 v regulator adj regulator v out t a = 25 c, i out = 50 ma v nom 2.9% v v v output voltage (note 8) 5 v regulator 3.3 v regulator 1.5 v regulator adj regulator v out 1.0 ma < i out < 500 ma ( ? 4.9%) 4.755 3.138 1.427 1.189 v nom 5.0 3.3 1.5 1.25 (+4.9%) 5.245 3.462 1.574 1.311 v v v line regulation reg line i out = 50 ma 2.5 v or (v out + 1.0 v) < v in < 16 v ? 1.0 0.1 1.0 % load regulation reg load 1.0 ma < i out < 500 ma ? 1.0 0.35 1.0 % dropout voltage (note 9) 5.0 v version 3.3 v version 1.5 v version (note 10) adjustable version (note 11) v do i out = 1.0 ma, v out = ? 2% i out = 500 ma, v out = ? 2% i out = 1.0 ma, v out = ? 2% i out = 500 ma, v out = ? 2% i out = 1.0 ma, v out = ? 2% i out = 500 ma, v out = ? 2% i out = 1.0 ma, v out = ? 2% i out = 500 ma, v out = ? 2% ? ? ? ? ? ? ? ? 5 230 5 230 ? ? 5 230 90 700 90 700 1073 1073 90 700 mv ground current i gnd i out = 100 a i out = 500 ma 300 10 500 20 a ma disable current in shutdown (ncp5500, ncv5500) i sd adjustable and 1.5 v versions all other versions 30 40 50 50 a current limit i out(lim) v out = 90% of v out(nom) 500 700 900 ma ripple rejection ratio (notes 9 & 14) rr 120 hz i out = 100 ma, 1 khz 10 khz ? ? ? 75 75 70 ? ? ? db output noise voltage (notes 12 & 14) v n f = 10 hz to 100 khz, v in = 2.5 v v out = 1.25 v, i out = 1.0 ma f = 10 hz to 100 khz, v in = 2.5 v v out = 1.25 v, i out = 100 ma 18 35 vrms enable (ncp5500, ncv5500 only) enable voltage v enoff v enon off (shutdown) state on (enabled) state 2.0 0.4 v enable pin bias current i en v en = v in , i out = 1.0 ma ? 1.0 a adjust adjust pin current (note 14) i adj v en = v in , v adj = 1.25 v, v out = 1.25 v ? 60 na thermal shutdown thermal shutdown temperature (note 14) tsd i out = 100 a 150 ? 210 c 8. deviation from nominal. for adjustable versions, pin adj connected to v out . 9. see typical characteristics section for additional information. 10. v do is constrained by the minimum input voltage of 2.5 v. 11. v out is set by external resistor divider to 5 v. 12. v n for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the foll owing formula: v n = v n(x) * v out / 1.25, where v n(x) is the typical value from the table above. 13. performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 14. values are based on design and/or characterization.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 5 typical characteristics figure 3. output voltage vs. ambient temperature t a , ambient temperature ( c) 120 80 40 0 ? 40 4.75 4.80 4.85 4.95 5.05 5.10 5.15 5.25 v out , output voltage (v) 4.90 5.00 5.20 v in = 13.2 v r l = 1 k figure 4. output voltage vs. ambient temperature figure 5. output voltage vs. ambient temperature t a , ambient temperature ( c) 120 80 40 0 ? 40 1.42 1.44 1.46 1.48 1.50 1.54 1.56 1.58 v out , output voltage (v) 1.52 v in = 13.2 v r l = 1 k figure 6. output voltage vs. ambient temperature v out(nom) = 5 v v out(nom) = 1.5 v figure 7. dropout voltage vs. output current i out , output current (ma) 600 500 400 300 200 100 0 0 100 200 300 400 500 v do , dropout voltage (mv) t a = ? 40 c t a = 25 c t a = 125 c v out(nom) = 5 v figure 8. dropout voltage vs. output current 3.15 3.18 3.21 3.24 3.27 3.30 3.33 3.36 3.39 3.42 3.45 ? 40 0 40 80 120 t a , ambient temperature ( c) v out , output voltage (v) v in = 13.2 v r l = 1 k v out(nom) = 3.3 v 1.20 1.21 1.22 1.23 1.24 1.25 1.26 1.27 1.28 1.29 1.30 ? 40 0 40 80 120 t a , ambient temperature ( c) v out , output voltage (v) v out(nom) = 1.25 v (adj) v in = 13.2 v r l = 1 k 0 50 100 150 200 250 300 350 400 450 500 i out , output current (ma) v do dropout voltage (mv) t a = 125 c t a = 25 c t a = ? 40 c v out(nom) = 3.3 v 600 500 400 300 200 100 0
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 6 typical characteristics figure 9. ground current vs. output current i out , output current (ma) 700 600 500 400 300 200 100 0 0 2 4 6 10 12 14 18 i gnd , ground current (ma) 8 16 t a = ? 40 c t a = 25 c t a = 125 c v out(nom) = 5 v v in , input voltage (v) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 i gnd , ground current (ma) r l = 1 k v out(nom) = 5 v v in , input voltage (v) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 i gnd , ground current (ma) r l = 1 k v out(nom) = 1.5 v figure 10. ground current vs. output current figure 11. ground current vs. input voltage figure 12. ground current vs. input voltage figure 13. ground current vs. input voltage figure 14. ground current vs. input voltage 0 100 200 300 400 500 600 700 18 16 14 12 10 8 6 4 2 0 i out , output current (ma) i gnd , ground current (ma) v out(nom) = 1.25 v (adj) t a = ? 40 c t a = 25 c t a = 125 c 0 1 2 3 4 5 6 01234567 v in , input voltage (v) i gnd , ground current (ma) r l = 1 k v out(nom) = 3.3 v 0 1 2 3 4 5 6 01234567 i gnd , ground current (ma) v in , input voltage (v) v out(nom) = 1.25 v (adj) r l = 1 k
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 7 typical characteristics figure 15. ripple rejection vs. frequency f, frequency (khz) 100 10 1 0.1 0.01 0 10 20 30 40 50 70 90 rr, ripple rejection (db) 60 80 v in = 6 v, v in = 0.5 v pp 500 ma 100 ma 1 ma v out(nom) = 1.5 v figure 16. ripple rejection vs. frequency f, frequency (khz) 100 10 1 0.1 0.01 0 10 20 30 40 50 70 90 rr, ripple rejection (db) 60 80 500 ma 100 ma 1 ma v out(nom) = 1.25 v (adj) i out , output current (ma) 500 450 250 200 150 100 50 0 0 1 3 4 5 7 9 10 esr ( ) 400 350 300 2 6 8 unstable region stable region figure 17. output capacitor esr stability vs. output current i out , output current (ma) 500 450 250 200 150 100 50 0 0 1 3 4 5 7 9 10 esr ( ) 400 350 300 2 6 8 unstable region stable region figure 18. output capacitor esr stability vs. output current figure 19. output capacitor esr stability vs. output current c out = 1 f to 10 f v out(nom) = 5 v figure 20. output capacitor esr stability vs. output current c out = 1 f to 10 f v out(nom) = 1.5 v i out , output current (ma) esr ( ) c out = 1 f to 10 f v out(nom) = 3.3 v c out = 1 f to 10 f v out(nom) = 1.25 v (adj) 0 1 2 3 4 5 6 7 8 9 10 11 12 0 50 100 150 200 250 300 350 400 450 500 500 450 250 200 150 100 50 0 400 350 300 0 1 2 3 4 5 6 7 8 9 10 0 50 100 150 200 250 300 350 400 450 500 i out , output current (ma) esr ( ) unstable region stable region unstable region stable region v in = 6 v, v in = 0.5 v pp note: typical characteristics were measured with the same conditions as electrical characteristics, unless otherwise noted.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 8 figure 21. measuring circuits input enable output adj gnd ncp5500 r l c in 10 f c in2 100 nf en i adj i gnd i q i en i in i out c out ncv5500 input output gnd r l c in 10 f c in2 100 nf i gnd i q i in i out c out ncp5501 ncv5501 v out v in v out v in circuit description the ncp5500/ncp5501/ncv5500/ncv5501 are integrated linear regulators with a dc load current capability of 500 ma. the output voltage is regulated by a pnp pass transistor controlled by an error amplifier and band gap reference. the choice of a pnp pass element provides the lowest possible dropout voltage, particularly at reduced load currents. pass transistor base drive current is controlled to prevent oversaturation. the regulator is internally protected by both current limit and thermal shutdown. thermal shutdown occurs when the junction temperature exceeds 150 c. the ncv5500 includes an enable/shutdown pin to turn of f the regulator to a low current drain standby state. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor via a buffer. the reference is a bandgap design for enhanced temperature stability. saturation control of the pnp pass transistor is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitor is necessary to stabilize the input impedance to reduce transient line influences. the output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. refer to typical operating characteristics for stability regions. enable input (ncp5500, ncv5500) the enable pin is used to turn the regulator on or off. by holding the pin at a voltage less than 0.4 v, the output of the regulator will be turned off to a minimal current drain state. when the voltage at the enable pin is greater than 2.0 v, the output of the regulator will be enabled and rise to the regulated output voltage. the enable pin may be connected directly to the input pin to provide a constant enable to the regulator. active load protection in shutdown (ncp5500, ncv5500) when a linear regulator is disabled (shutdown), the output (load) voltage should be zero. however, stray pc board leakage paths, output capacitor dielectric absorption, and inductively coupled power sources can cause an undesirable regulator output voltage if load current is low or zero. the ncv5500 features a load protection network that is active only during shutdown mode. this network switches in a shunt current path (~500 a) from v out to ground. this feature also provides a controlled (?soft?) discharge path for the output capacitor after a transition from enable to shutdown.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 9 calculating resistors for the adj versions the adjustable version uses feedback resistors to adjust the output to the desired output voltage. with v out connected to adj, the adjustable version will regulate at 1.25 v 4.9% (1250 61.25 mv). output voltage formula with an external resistor divider: v out 1.25 v 60e ? 9 (r 1 r 2) (r 1 r 2 )
(r 1 r 2 ) r 2
where r 1 = value of the divider resistor connected between v out and adj, r 2 = value of the divider resistor connected between adj and gnd, the term ?1.25 v? has a tolerance of 4.9%; the term ?60e ? 9? can vary in the range 15e ? 9 to 60e ? 9. for values of r 2 less than 15 k , the term within brackets ( [ ] ) will evaluate to less than 1 mv and can be ignored. this simplifies the output voltage formula to: v out = 1.25 v * ((r1 + r2) / r2)) with a tolerance of 4.9%, which is the tolerance of the 1.25 v output when delivering up to 500 ma of output current. definition of terms dropout voltage: the input ? to ? output voltage differential at which the circuit ceases to regulate against further reduction input voltage. measured when the output voltage has dropped 2% relative to the value measured at nominal input voltage. dropout voltage is dependent upon load current and junction temperature. input voltage: the dc voltage applied to the input terminals with respect to ground. line regulation: the change in output voltage for a change in the input voltage. the measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. load regulation: the change in output voltage for a change in load current at constant chip temperature. pulse loading techniques are employed such that the average chip temperature is not significantly affected. quiescent and ground current: the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. ripple rejection: the ratio of the peak ? to ? peak input ripple voltage to the peak ? to ? peak output ripple voltage. current limit: peak current that can be delivered to the output. calculating power dissipation the maximum power dissipation for a single output regulator (figure 21) is: p d(max) v in(max) v out(min) i out(max) v in(max) i gnd (eq. 1) where v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, i gnd is the ground current at i out(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: r ja 150 c t a
p d (eq. 2) the value of r ja can then be compared with those in the thermal characteristics table. those packages with r ja less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (eq. 3) where r jc is the junction ? to ? case thermal resistance, r cs is the case ? to ? heatsink thermal resistance, r sa is the heatsink ? to ? ambient thermal resistance. r jc appears in the thermal characteristics table. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sink considerations are further discussed in on semiconductor application note an1040/d.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 10 ordering information device nominal output voltage* package marking package shipping ? ncp5500dt15rkg 1.5 p5500lg dpak 5 (pb ? free) 2500 / tape & reel ncv5500dt15rkg v5500lg dpak 5 (pb ? free) 2500 / tape & reel ncp5501dt15rkg p5501lg dpak 3 (pb ? free) 2500 / tape & reel ncv5501dt15rkg v5501lg dpak 3 (pb ? free) 2500 / tape & reel ncp5501dt15g p5501lg dpak 3 (pb ? free) 75 units / rail ncv5501dt15g v5501lg dpak 3 (pb ? free) 75 units / rail ncp5500dt33rkg 3.3 p5500tg dpak 5 (pb ? free) 2500 / tape & reel ncv5500dt33rkg v5500tg dpak 5 (pb ? free) 2500 / tape & reel ncp5501dt33rkg p5501tg dpak 3 (pb ? free) 2500 / tape & reel ncv5501dt33rkg v5501tg dpak 3 (pb ? free) 2500 / tape & reel ncp5501dt33g p5501tg dpak 3 (pb ? free) 75 units / rail ncv5501dt33g v5501tg dpak 3 (pb ? free) 75 units / rail ncp5500dt50rkg 5.0 p5500ug dpak 5 (pb ? free) 2500 / tape & reel ncv5500dt50rkg v5500ug dpak 5 (pb ? free) 2500 / tape & reel ncp5501dt50rkg p5501ug dpak 3 (pb ? free) 2500 / tape & reel ncv5501dt50rkg v5501ug dpak 3 (pb ? free) 2500 / tape & reel ncp5501dt50g p5501ug dpak 3 (pb ? free) 75 units / rail NCV5501DT50G v5501ug dpak 3 (pb ? free) 75 units / rail ncp5500dtadjrkg adjustable p5500wg dpak 5 (pb ? free) 2500 / tape & reel ncv5500dtadjrkg v5500wg dpak 5 (pb ? free) 2500 / tape & reel ncp5500dadjr2g adjustable 5500b so ? 8 (pb ? free) 2500 / tape & reel ncv5500dadjr2g adjustable 5500a so ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *contact on semiconductor for other fixed voltages.
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 11 package dimensions dpak 3 (single gauge) case 369c ? 01 issue d b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within dimensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches
scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 12 package dimensions d a k b r v s f l g 5 pl m 0.13 (0.005) t e c u j h ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.020 0.028 0.51 0.71 e 0.018 0.023 0.46 0.58 f 0.024 0.032 0.61 0.81 g 0.180 bsc 4.56 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.045 bsc 1.14 bsc r 0.170 0.190 4.32 4.83 s 0.025 0.040 0.63 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 0.170 3.93 4.32 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. r1 0.185 0.210 4.70 5.33 r1 1234 5 dpak 5, center lead crop case 175aa ? 01 issue a 6.4 0.252 0.8 0.031 10.6 0.417 5.8 0.228 scale 4:1 mm inches
0.34 0.013 5.36 0.217 2.2 0.086 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
ncp5500, ncv5500, ncp5501, ncv5501 http://onsemi.com 13 package dimensions soic ? 8 nb case 751 ? 07 issue aj seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches
scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp5500/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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